The death of hardware store optimization.
Examining the extent of AVX related downclocking on Intel's Ice Lake CPU
Concurrent operations can be grouped relatively neatly into categories based on their cost
Taking a second look at the newly introduced mask registers, this time with the benefit of a SKX die shot from Fritzchens Fritz.
We look at the zero store optimization as it applies to Intel's newest micro-architecture.
Probing a previously undocumented zero-related optimization on Intel CPUs.
Adding static comments to a static blog using staticman. Static.
Unexpected performance deviations depending on how you spell zero.
Investigating some details of SIMD related frequency transitions on Intel CPUs.
Some mostly too-low-level-to-care-about hardware details of the mask registers introduced in AVX-512.